This invention relates to the field of semiconductor memory devices and, more particularly, to a memory system requiring a minimum of select lines while using power only when accessed.
Semiconductor memories are, of course, well known in the art and are widely used commercially. In general, they consist of an input decoding network and a memory array, with the decoder functioning to select a specific portion of the memory and cause the information in that portion to be made available at one or more outputs of the array. The need to design devices using minimum power have led to the development of memory elements which do not dissipate power unless they are accessed. However, because of design problems related to decoder power-up delays, it has not been possible to combine input decoding with minimum power dissipation while retaining the capability of immediate response to input select signals.